Silicon compounds, such as silicon dioxide, that can be used as coatings are particularly valuable on electronic substrates. Such coatings serve as protective coatings, inter-level dielectric layers, doped dielectric layers to produce transistor-like devices, multilayer devices, etc.
Unfortunately, development of high integration and high-density very large-scale integrated circuits has progressed so rapidly that earlier silicon compounds have become less than satisfactory. The combination of high density and submicron geometries has lead to the surfaces of semiconductor substrates having relatively large protrusions and depressions with small spaces in between. This has posed serious problems for fabrication technology because of the difficulty of providing uniform depositions and subsequently planarizing such surfaces. One answer has been to use dielectrics which are deposited in liquid form. By spinning on dielectric films in a liquid form on a silicon substrate followed by a series of soft bakes and a hard bake to cause solvent evaporation, a high degree of uniformity and planarization have been achievable.
The soft bakes are performed on three different heating elements with a robot arm moving the silicon substrates from one heating element to another. The dielectric film-coated silicon substrates are soft baked by heating in air with a nitrogen purge at 150.degree. C., 200.degree. C., and 350.degree. C. for 60 seconds each. This prevents curing of the dielectric film before the solvent evaporates. A hard bake at 400.degree. C. for an hour cures the dielectric film.
The materials that have been used for the spun on dielectric films have included various organic silicon compounds in liquid solvents. These organic silicon compounds have included TBOS (tetraethoxysilane), TMOS (tetramethoxysilane), OMCTS (octamethyleyclotetrasiloxane), HMDS (hexamethyldisiloxane), SOB (trimethylsilil borxle), DADBS (diaceloxyditerliarybutoxsilane), and SOP (trimethylsilil phosphate). And the fluid carrier would be a solvent such as MIBK (methyl isobutyl ketone). One of the more commonly used silicon-based, low dielectric constant materials is HSQ (hydrogen silsesquioxane) in MIBK solvent.
Subsequent to the hard bake, a layer of a second dielectric material, typically an oxide material, is deposited over the cured dielectric film to form a cap layer. The layer of oxide material is generally deposited by a chemical vapor deposition (CVD) process. In a conventional thermal CVD process, reactive gases are supplied to the dielectric-film coated silicon substrate surface where heat-induced chemical reactions take place to produce a desired oxide layer. The oxide mats that are suitable for this application include silane oxide and TEOS (tetra ethyl ortho silicate).
After the deposition of the oxide layer over the silicon substrate, a layer of photoresist material is deposited over the oxide layer. Then, a conventional photolithographical masking process is used to pattern the photoresist layer so as to expose regions of the oxide layer that are directly over selected metal regions on the silicon substrate. Typically, an isotropic wet etch process is then used to create a wineglass shape opening in the oxide film. The materials that have been for the wet etch process have included various chemicals such as ammonium fluoride or acetic acid.
Thereafter, an anisotropic dry etching process is used to make another opening through the wineglass shape openings, the remaining oxide film and the dielectric film, to expose the selected metal regions on the silicon substrate. The dry etching processes could be plasma or reactive ion etching.
A major problem is that oxide films deposited by CVD have various defects, such as pinholes. Chemicals used in the wet etch process may propagate through these pinholes and reach the underlying dielectric film. Wet etch chemicals generally have significantly higher etch rate for dielectric films such as HSQ, than for the denseroxide films. As a result, large portions of the dielectric film may be etched away, leaving big holes in the dielectric film. These big holes are undesirable because they may lead to short circuit defects. For example, in a subsequent contact fill process wherein a contact metal is deposited through the openings onto the metal regions on the silicon substrate, these holes may be filled with the contact metal causing short circuit between adjacent metal regions.
The problem associated with big holes in dielectric films due to wet etch chemical propagation has been recognized and attempts have been made to remedy this problem. One approach was to increase the thickness of the oxide film. However, it slows down the manufacturing process and increases the cost of the operation. Another approach was to improve the process of forming the CVD oxide film by rotating the silicon substrate during the CVD process to form many layers of oxide films with different structural orientations. With this process, it was believed that it would be less probable that pinholes in one layer would be aligned with pinholes in the adjacent layers making it more difficult for the wet etch chemicals to propagate through the pinholes in the oxide films into the dielectric film. However, rotating the silicon substrate during the deposition was expensive and proved difficult to implement because it required significant modification to the CVD process equipment.
A manufacturing method of producing a silicon-based, dielectric material that is more resistant to wet etch chemicals has long been sought but has eluded those skilled in the art.